2008/2009: Architecture, réseaux et système I

course by Florent de Dinechin coTD with Andreea Chis and Matthieu Gallet

• The course support can be found here
• Course attendance is highly recommended
• The TDs and respective solutions (if available) are found below:

  TD1 - Codage et Calcul

  TD2 - Calcul booléen

  TD3 - Mémoires

  TD4 - Prenons le bus

  TD5 - Une montre à quartz

  TD6 - Circuits asynchrones

  TD7/8 - Un microprocesseur RISC 16 bits (I)

  TD9 - Un microprocesseur RISC 16 bits (II)

  TD10 - Premier contact avec VHDL et ModelSim!

  TD11/12 - Un vrai RISC dans mon FPGA!

• First homework consisting in building a text-mode VGA driver is available here.
• The architecture and` FSM for request#1 of the first homework are available[Architecture,FSM]
  • Following negotiations, the deadline turning-in the first point (request #1) of the homework is Monday 26 October (Lundi 26 Octobre).
  • The new deadline for the rest of the homework is: Tuesday, 4th of November 18:00 my office(369)
  • In order to help you solve the homework I have prepared some links which give you more information on:
    • FSMs:
      • Lesson on FSMs (en anglais)
      • General presentation of Moore and Mealy state machines comprising also VHDL code(en anglais)
      • FSM presentation (en français)
      • More presentation on FSMs (en français)
    • The VGA display:
      • Information on the : VGA Port and the VGA Signal Timings
      • More on VGA Signal Timing can be found here and here
      • Information on how to store the characters in the ROM is found here
    • Drawing the architecture
      • This is a VHDL guide for ACTEL FPGAs. It presents the symbols of the components and their description in VHDL
      • This is the block-diagram (top-level abstract schematic) of a circuit. Inspire yourselfs.
      • This is another one for a MIPS processor.
• The architecture and FSM for request#1 of the first homework are available[Architecture,FSM]
• The second homework consisting in building a PS2 keyboard driver is available here.
  • This homework has been discarded due to your charged schedule.
• The second homework consisting in finalizing an assembler program written in C++ and then writing some small program in it is available here.
  • The deadline in on the 19th of December.
  • The required archive for the homework can be downloaded here
• The third homework/lab-work consisting in a VHDL implementation of the TRAJAN processor it is available here.

  • Assignment	Team
    Control Unit	Mathieu Barthelemy, Yann Hourdel, Guillaume Moutard
    Display Driver	Guillaume Allais, Marthe Bonamy, Sylvain Dailler, Jill Vie
    ALU	Lucien Capdevielle, Ioos Guillaume, Lucie Martinet, Amaury Pouly
    Rest of components	Loic Blet, Hugo Feree, Jean-Marie Madiot

  • The Architecture can be found here.
  • A description of the operating modes of the ALU can be found here.
  • The Instruction Set can be found here.
  • Two example programs(selected from the homework) are shown below:

    Display and Evaluate polynomial in a given point
    Get into the holiday spirit